Quadrature decoding in hardware, or just counters
Some encoders produce up to a million counts per revolution. For very fast quadrature signals there is no way that a software quadrature decoder can avoid overrun errors. Instead we may use the LS7083 chip to translate the A and B quadrature signals into brief pulses indicating up-count or down-count. The up and down counts can be configured as external input signals to increment counter/timer 0 and counter/timer 1 respectively. No ISR is required, one simply reads the timer counts whenever required.
In the example code QuadratureHard.c, the counter/timers are read every 10mS. They are both 16-bit counters, so they roll over from 65535 to 0. To assemble a single 32-bit encoder count variable called bigcount, we add on the recent up-counts from Timer 0 and subtract the recent down-counts from Timer 1. If either Timer has decreased in value, it must be due to a rollover, and bigcount is corrected by 65536.