Difference between revisions of "PIC16F684 Registers"
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====TRISC==== |
====TRISC==== |
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[[image:PIC register TRISC.png|center]] |
[[image:PIC register TRISC.png|center]] |
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===Timers=== |
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====T2CON==== |
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T2CON sets up Timer2, which is used for PWM timing. |
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[[image:PIC register T2CON.png|center]] |
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===A/D Configuration and Usage=== |
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When configuring and using the ADC the following functions must be considered: |
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* Port configuration (ANSEL) |
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* Channel selection (ADCON0) |
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* ADC voltage reference selection (ADCON0) |
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* ADC conversion clock source (ADCON1) |
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* Interrupt control (INTCON) |
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* Results formatting (ADCON0) |
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====ADCON0==== |
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[[image:PIC register ADCON0.png|center]] |
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====ADCON1==== |
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[[image:PIC register ADCON1.png|center]] |
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====ADRESH==== |
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ADRESH contains the highest significant digits of the A/D conversion. The values contained in this register depend on whether you select "Right Justified" (ADFM=1) or "Left Justified" (ADFM=0) results. |
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:'''Right Justified (ADFM=1):''' |
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[[image:PIC register ADRESHR.png|center]] |
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:'''Left Justified (ADMF=0):''' |
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[[image:PIC register ADRESHL.png|center]] |
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====ADRESL==== |
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ADRESL contains the lowest significant digits of the A/D conversion. The values contained in this register depend on whether you select "Right Justified" (ADFM=1) or "Left Justified" (ADFM=0) results. |
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:'''Right Justified (ADFM=1):''' |
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[[image:PIC register ADRESLR.png|center]] |
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:'''Left Justified (ADMF=0):''' |
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[[image:PIC register ADRESLL.png|center]] |
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===PWM Configuration and Usage=== |
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The PWM duty cycle is specified by writing a 10-bit value to multiple registers: CCPR1L register and CCP1<1:0> bits of the CCP1CON register. The CCPR1L contains the eight MSbs and the CCP1<1:0> bits of the CCP1CON register contain the two LSbs. |
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====CCP1CON==== |
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The CCP1CON register configures PWM output by selecting Single, Half or Full-Bridge modes. These modes were created to make interfacing the PIC16F684 with H-Bridges and Full-Bridges simple. |
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[[image:PIC register CCP1CON.png|center]] |
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====CCPR1L==== |
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The CCPR1L register holds the 8 MSbs of the PWM duty cycle. '''If you are using an analog input to determine the duty cycle, you should set up the A/D to be left justified and then all you have to do is copy ADRESH to CCPR1L.''' |
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====PR2==== |
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The PR2 is an 8-bit register used to set the PWM period. This must be set along with the Timer2 prescale in T2CON. The table below shows the results: |
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[[image:PIC PWM Frequencies.png|center]] |
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Latest revision as of 15:38, 11 July 2006
This page is a more detailed overview of the registers. It includes the most commonly used registers. All remaining information can be found on the Microchip website.
Memory Map
These images show the memory map of the PIC16F684. Use these for a quick reference for register addresses and initial values.
Registers in Memory Bank 0
Registers in Memory Bank 1
Register Descriptions
Configuration
STATUS
OPTION
INTCON
PIE1
The PIE1 is used to enable/disable interrupts.
I/O
PORTA
TRISA
ANSEL
The ANSEL register determines whether a pin, AN<7:0>, is an analog input or not.
IOCA
The IOCA register determines whether or not an interrupt is generated when a digital pin on PORTA, RA<5:0>, experiences a change in value.
PORTC
TRISC
Timers
T2CON
T2CON sets up Timer2, which is used for PWM timing.
A/D Configuration and Usage
When configuring and using the ADC the following functions must be considered:
- Port configuration (ANSEL)
- Channel selection (ADCON0)
- ADC voltage reference selection (ADCON0)
- ADC conversion clock source (ADCON1)
- Interrupt control (INTCON)
- Results formatting (ADCON0)
ADCON0
ADCON1
ADRESH
ADRESH contains the highest significant digits of the A/D conversion. The values contained in this register depend on whether you select "Right Justified" (ADFM=1) or "Left Justified" (ADFM=0) results.
- Right Justified (ADFM=1):
- Left Justified (ADMF=0):
ADRESL
ADRESL contains the lowest significant digits of the A/D conversion. The values contained in this register depend on whether you select "Right Justified" (ADFM=1) or "Left Justified" (ADFM=0) results.
- Right Justified (ADFM=1):
- Left Justified (ADMF=0):
PWM Configuration and Usage
The PWM duty cycle is specified by writing a 10-bit value to multiple registers: CCPR1L register and CCP1<1:0> bits of the CCP1CON register. The CCPR1L contains the eight MSbs and the CCP1<1:0> bits of the CCP1CON register contain the two LSbs.
CCP1CON
The CCP1CON register configures PWM output by selecting Single, Half or Full-Bridge modes. These modes were created to make interfacing the PIC16F684 with H-Bridges and Full-Bridges simple.
CCPR1L
The CCPR1L register holds the 8 MSbs of the PWM duty cycle. If you are using an analog input to determine the duty cycle, you should set up the A/D to be left justified and then all you have to do is copy ADRESH to CCPR1L.
PR2
The PR2 is an 8-bit register used to set the PWM period. This must be set along with the Timer2 prescale in T2CON. The table below shows the results:
