Variable Frequency Electrosense - Revision history

Lynch: /* Signal Amplification/Level Shifting Circuit */

2010-06-12T19:45:40Z

Signal Amplification/Level Shifting Circuit

← Older revision		Revision as of 14:45, 12 June 2010
Line 110:		Line 110:
	(make sure to adjust the balancing circuitry with potentiometer before the test)		(make sure to adjust the balancing circuitry with potentiometer before the test)
	*Two signals serve as inputs to an instrumentation amp which has a fixed gain of 1000		*Two signals serve as inputs to an instrumentation amp which has a fixed gain of 1000
	*Output signal is run through a bandpass filter (high pass RC = 0.0022 s, or 72 Hz; low pass RC = 1.5E-5 s, or 10,600 Hz)		*Output signal is run through a bandpass filter (high pass RC = 0.0022 s, or 72 Hz cut-off; low pass RC = 1.5E-5 s, or 10,600 Hz cut-off)
	*Final signal is level shifted so that it can be read into the PIC's ADC which requires the signal be between 0 and 3.3 volts.		*Final signal is level shifted so that it can be read into the PIC's ADC which requires the signal be between 0 and 3.3 volts.
	Note that this circuit is built in solder due to the extremely small voltage changes that need to be detected between the two sensed waves by the instrumentation amp.		Note that this circuit is built in solder due to the extremely small voltage changes that need to be detected between the two sensed waves by the instrumentation amp.

JoshuaPeng: /* Signal Generation Circuit */

2010-06-11T08:06:03Z

Signal Generation Circuit

← Older revision		Revision as of 03:06, 11 June 2010
Line 78:		Line 78:
	==Signal Generation Circuit==		==Signal Generation Circuit==

	The AD9833 is a surface mount function generating chip that creates sinusoidal signals at frequencies chosen by the PIC. Because the the signal out of the chip is about 500mV peak-to-peak, centered around 250 mV above ground, an amplifier is used to boost the signal by a factor of 3.5 (2.4 V peak-to-peak) and level shift it so it is centered around 0 V (ground), i.e., +/- 1.2 V. However, the PIC only reads the value between 0 and 3.3V, so the signal that is read by the PIC goes through another level shifter first.		The AD9833 is a surface mount function generating chip that creates sinusoidal signals at frequencies chosen by the PIC. Because the the signal out of the chip is about 500mV peak-to-peak, centered around 250 mV above ground, an amplifier is used to boost the signal by a factor of 4.7 (2.4 V peak-to-peak) and level shift it so it is centered around 0 V (ground), i.e., +/- 1.2 V. However, the PIC only reads the value between 0 and 3.3V, so the signal that is read by the PIC goes through another level shifter first.

	In the circuit below, the potentiometer is a 100k potentiometer and is used to adjust the offset of the level shift.		In the circuit below, the potentiometer is a 100k potentiometer and is used to adjust the offset of the level shift.

JoshuaPeng: /* Signal Generation Circuit */

2010-06-11T08:05:02Z

Signal Generation Circuit

← Older revision		Revision as of 03:05, 11 June 2010
Line 78:		Line 78:
	==Signal Generation Circuit==		==Signal Generation Circuit==

	The AD9833 is a surface mount function generating chip that creates sinusoidal signals at frequencies chosen by the PIC. Because the the signal out of the chip is about ~~680mV~~ peak-to-peak, centered around ~~500~~ mV above ground, an amplifier is used to boost the signal by a factor of 3.5 (2.4 V peak-to-peak) and level shift it so it is centered around 0 V (ground), i.e., +/- 1.2 V. However, the PIC only reads the value between 0 and 3.3V, so the signal that is read by the PIC goes through another level shifter first.		The AD9833 is a surface mount function generating chip that creates sinusoidal signals at frequencies chosen by the PIC. Because the the signal out of the chip is about 500mV peak-to-peak, centered around 250 mV above ground, an amplifier is used to boost the signal by a factor of 3.5 (2.4 V peak-to-peak) and level shift it so it is centered around 0 V (ground), i.e., +/- 1.2 V. However, the PIC only reads the value between 0 and 3.3V, so the signal that is read by the PIC goes through another level shifter first.

	In the circuit below, the potentiometer is a 100k potentiometer and is used to adjust the offset of the level shift.		In the circuit below, the potentiometer is a 100k potentiometer and is used to adjust the offset of the level shift.

JoshuaPeng: /* Test Cases and Results */

2010-06-11T08:02:31Z

Test Cases and Results

← Older revision		Revision as of 03:02, 11 June 2010
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	By selecting R1 to be slightly greater than R, it can simulate resistive object.		By selecting R1 to be slightly greater than R, it can simulate resistive object.

	'''PLEASE INTERPRET THESE PLOTS. ARE THEY WHAT YOU EXPECT, AS YOU CHANGE THE RESISTANCE AND THE CAPACITANCE? EXPLAIN IN TERMS OF THE FREQUENCY CHARACTERISTICS OF A CAPACITOR.'''

	[[Image:Magbode2.jpg \| 500px]]		[[Image:Magbode2.jpg \| 500px]]

JoshuaPeng: /* Signal Generation Circuit */

2010-06-11T08:01:54Z

Signal Generation Circuit

← Older revision		Revision as of 03:01, 11 June 2010
Line 78:		Line 78:
	==Signal Generation Circuit==		==Signal Generation Circuit==

	The AD9833 is a surface mount function generating chip that creates sinusoidal signals at frequencies chosen by the PIC. Because the the signal out of the chip is about 680mV peak-to-peak, centered around 500 mV above ground, an amplifier is used to boost the signal by a factor of 3.5 (2.4 V peak-to-peak) ~~'''(THIS GAIN IS INCONSISTENT WITH THE CIRCUIT DIAGRAM; ALSO, NOT SHOWN IS THE CIRCUIT THAT APPARENTLY LEVEL SHIFTS TO GO INTO THE PIC; OUTPUT OF 741 SHOULDN'T GO DIRECTLY TO PIC B4)'''~~ and level shift it so it is centered around 0 V (ground), i.e., +/- 1.2 V. However, the PIC only reads the value between 0 and 3.3V, so the signal that is read by the PIC goes through another level shifter first.		The AD9833 is a surface mount function generating chip that creates sinusoidal signals at frequencies chosen by the PIC. Because the the signal out of the chip is about 680mV peak-to-peak, centered around 500 mV above ground, an amplifier is used to boost the signal by a factor of 3.5 (2.4 V peak-to-peak) and level shift it so it is centered around 0 V (ground), i.e., +/- 1.2 V. However, the PIC only reads the value between 0 and 3.3V, so the signal that is read by the PIC goes through another level shifter first.

	In the circuit below, the potentiometer is a 100k potentiometer and is used to adjust the offset of the level shift.		In the circuit below, the potentiometer is a 100k potentiometer and is used to adjust the offset of the level shift.

JoshuaPeng: /* Signal Generation Circuit */

2010-06-11T08:01:40Z

Signal Generation Circuit

← Older revision		Revision as of 03:01, 11 June 2010
Line 78:		Line 78:
	==Signal Generation Circuit==		==Signal Generation Circuit==

	The AD9833 is a surface mount function generating chip that creates sinusoidal signals at frequencies chosen by the PIC. Because the the signal out of the chip is about 680mV peak-to-peak, centered around ~~340~~ mV above ground, an amplifier is used to boost the signal by a factor of 3.5 (2.4 V peak-to-peak) '''(THIS GAIN IS INCONSISTENT WITH THE CIRCUIT DIAGRAM; ALSO, NOT SHOWN IS THE CIRCUIT THAT APPARENTLY LEVEL SHIFTS TO GO INTO THE PIC; OUTPUT OF 741 SHOULDN'T GO DIRECTLY TO PIC B4)''' and level shift it so it is centered around 0 V (ground), i.e., +/- 1.2 V. However, the PIC only reads the value between 0 and 3.3V, so the signal that is read by the PIC goes through another level shifter first.		The AD9833 is a surface mount function generating chip that creates sinusoidal signals at frequencies chosen by the PIC. Because the the signal out of the chip is about 680mV peak-to-peak, centered around 500 mV above ground, an amplifier is used to boost the signal by a factor of 3.5 (2.4 V peak-to-peak) '''(THIS GAIN IS INCONSISTENT WITH THE CIRCUIT DIAGRAM; ALSO, NOT SHOWN IS THE CIRCUIT THAT APPARENTLY LEVEL SHIFTS TO GO INTO THE PIC; OUTPUT OF 741 SHOULDN'T GO DIRECTLY TO PIC B4)''' and level shift it so it is centered around 0 V (ground), i.e., +/- 1.2 V. However, the PIC only reads the value between 0 and 3.3V, so the signal that is read by the PIC goes through another level shifter first.

	In the circuit below, the potentiometer is a 100k potentiometer and is used to adjust the offset of the level shift.		In the circuit below, the potentiometer is a 100k potentiometer and is used to adjust the offset of the level shift.

JoshuaPeng: /* Signal Amplification/Level Shifting Circuit */

2010-06-11T07:19:09Z

Signal Amplification/Level Shifting Circuit

← Older revision		Revision as of 02:19, 11 June 2010
Line 111:		Line 111:
	*Two signals serve as inputs to an instrumentation amp which has a fixed gain of 1000		*Two signals serve as inputs to an instrumentation amp which has a fixed gain of 1000
	*Output signal is run through a bandpass filter (high pass RC = 0.0022 s, or 72 Hz; low pass RC = 1.5E-5 s, or 10,600 Hz)		*Output signal is run through a bandpass filter (high pass RC = 0.0022 s, or 72 Hz; low pass RC = 1.5E-5 s, or 10,600 Hz)
	*Final signal is level shifted so that it can be read into the PIC's ADC which requires the signal be between 0 and 3.3 volts. ~~'''(This circuit should be looked at again. Seems to be trying to set a 3.3 V reference, but the resistances in the voltage divider are not low.)'''~~		*Final signal is level shifted so that it can be read into the PIC's ADC which requires the signal be between 0 and 3.3 volts.

	Note that this circuit is built in solder due to the extremely small voltage changes that need to be detected between the two sensed waves by the instrumentation amp.		Note that this circuit is built in solder due to the extremely small voltage changes that need to be detected between the two sensed waves by the instrumentation amp.

JoshuaPeng: /* Test Cases and Results */

2010-06-11T07:08:44Z

Test Cases and Results

← Older revision		Revision as of 02:08, 11 June 2010
Line 883:		Line 883:


	The ~~voltage across a capacitor lags the~~ current ~~and~~ the ~~current of~~ capacitor is depending on the freqeuncies because flowing through the capacitor is proportional to how quickly it is changing the voltage at any instant. Applying the terms of reactance, 1/(2pif*c), for low frequency, the imepedence of the capacitor should be really high and, for high frequency, the imepednece of the capacitor should be really low. So for low frequency ~~their~~ should be no current flow through capacitor and will act as a open circuit. And for high frequency their should be large amount of current flowing and it will react as a short circuit.		The current of the capacitor is depending on the freqeuncies because flowing through the capacitor is proportional to how quickly it is changing the voltage at any instant. Applying the terms of reactance, 1/(2pif*c), for low frequency, the imepedence of the capacitor should be really high and, for high frequency, the imepednece of the capacitor should be really low. So for low frequency there should be no current flow through capacitor and will act as a open circuit. And for high frequency their should be large amount of current flowing and it will react as a short circuit. Therefore, by connecting a capacitor, we should expect to see no change from the result that we've got from the measurement without the capacitor. And for higher frequency, we should expect to see the incrementing of the pk-to-pk value of receiving wave as frequency gets higer.

	Therefore, by connecting a capacitor, we should expect to see no change from the result we've got from the measurement without the capacitor. And we should expect to see decrementing from the magnitude plot.
			The magnitude plot shows what I expected to see. The graph for with capacitor stays same as the graph without capacitor between 100 Hz to 500 hz and it starts to increase the magnitude as frequency gets higher and it saturated about at 5000 Hz when current flow through the capacitor is maximum.

	==From last quater==		==From last quater==

JoshuaPeng: /* Test Cases and Results */

2010-06-11T06:48:07Z

Test Cases and Results

← Older revision		Revision as of 01:48, 11 June 2010
Line 881:		Line 881:

	-1005 with capacitor: R1 = 1005 and it is connected parallel with .5nF capacitor when R = 1k		-1005 with capacitor: R1 = 1005 and it is connected parallel with .5nF capacitor when R = 1k


			The voltage across a capacitor lags the current and the current of capacitor is depending on the freqeuncies because flowing through the capacitor is proportional to how quickly it is changing the voltage at any instant. Applying the terms of reactance, 1/(2pif*c), for low frequency, the imepedence of the capacitor should be really high and, for high frequency, the imepednece of the capacitor should be really low. So for low frequency their should be no current flow through capacitor and will act as a open circuit. And for high frequency their should be large amount of current flowing and it will react as a short circuit.
			Therefore, by connecting a capacitor, we should expect to see no change from the result we've got from the measurement without the capacitor. And we should expect to see decrementing from the magnitude plot.

	==From last quater==		==From last quater==

JoshuaPeng: /* Test Cases and Results */

2010-06-11T05:34:54Z

Test Cases and Results

← Older revision		Revision as of 00:34, 11 June 2010
Line 845:		Line 845:

	'''Bode plots for different five objects and no object'''		'''Bode plots for different five objects and no object'''

	'''NEED HIGHER RESOLUTION PLOTS FOR ARCHIVING! INDICATE THE LOG SCALE. DESCRIBE WHAT THE MAGNITUDE PLOTS MEAN (GAIN FROM WHICH SIGNAL TO WHICH SIGNAL).'''

	[[Image:Mag1.jpg \| 500px]]		[[Image:Mag1.jpg \| 500px]]