NU32v2: Interrupts - Revision history

Lynch at 11:26, 16 January 2016

2016-01-16T11:26:37Z

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			'''THIS PAGE REFERS TO A PRE-RELEASE VERSION OF THE NU32 PIC32 DEVELOPMENT BOARD. FOR INFORMATION, SAMPLE CODE, AND VIDEOS RELATED TO THE PRODUCTION VERSION (2016 AND LATER), AND TO THE CORRESPONDING BOOK "EMBEDDED COMPUTING AND MECHATRONICS WITH THE PIC32 MICROCONTROLLER," VISIT [[NU32\|THE NU32 PAGE]].'''


	Say your PIC is attending to some mundane task when an important event occurs. For example, the user has pressed a button. We want the PIC to respond immediately. To do so, we have this event generate an ''interrupt'', or ''interrupt request'' (IRQ), which interrupts the program and sends the CPU to execute some other code, called the ''interrupt service routine'' (or ISR). Once this code has completed, the CPU returns to its original task.		Say your PIC is attending to some mundane task when an important event occurs. For example, the user has pressed a button. We want the PIC to respond immediately. To do so, we have this event generate an ''interrupt'', or ''interrupt request'' (IRQ), which interrupts the program and sends the CPU to execute some other code, called the ''interrupt service routine'' (or ISR). Once this code has completed, the CPU returns to its original task.

Lynch: /* Sample Code */

2011-02-04T01:36:54Z

Sample Code

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	== Sample Code ==		== Sample Code ==

			'''See pages on specific peripherals to see how to create interrupts with those peripherals (e.g., counter/timers).'''

	Configuring the system to be able to handle multiple interrupts:		Configuring the system to be able to handle multiple interrupts:

Lynch at 11:21, 31 January 2011

2011-01-31T11:21:06Z

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	'''* UNDER CONSTRUCTION *'''

	Say your PIC is attending to some mundane task when an important event occurs. For example, the user has pressed a button. We want the PIC to respond immediately. To do so, we have this event generate an ''interrupt'', or ''interrupt request'' (IRQ), which interrupts the program and sends the CPU to execute some other code, called the ''interrupt service routine'' (or ISR). Once this code has completed, the CPU returns to its original task.		Say your PIC is attending to some mundane task when an important event occurs. For example, the user has pressed a button. We want the PIC to respond immediately. To do so, we have this event generate an ''interrupt'', or ''interrupt request'' (IRQ), which interrupts the program and sends the CPU to execute some other code, called the ''interrupt service routine'' (or ISR). Once this code has completed, the CPU returns to its original task.

Lynch: /* Library Functions */

2011-01-31T11:20:13Z

Library Functions

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	Usually we will not directly manipulate the interrupt registers. Instead, we will use library functions, found in pic32-libs/include/peripheral, the files beginning with "int". Below are some relevant functions. In addition to these, you will need library functions for the specific peripheral to enable the appropriate interrupt bit in IECx and to set interrupt flags in IFSx. See information on the specific peripheral.		Usually we will not directly manipulate the interrupt registers. Instead, we will use library functions, found in pic32-libs/include/peripheral, the files beginning with "int". Below are some relevant functions. In addition to these, you will need library functions for the specific peripheral to enable the appropriate interrupt bit in IECx and to set interrupt flags in IFSx. See information on the specific peripheral.

			'''"Legacy"''' (but you are more likely to use these):

		⚫	* void INTEnableSystemMultiVectoredInt(void): Performs the tasks of IntEnableInterrupts() above (enables CPU for interrupts) and INTConfigureSystem(INT_SYSTEM_CONFIG_MULT_VECTOR). In pic32-libs/peripheral/int/source.
		⚫	* mT2ClearIntFlag(): Clears the interrupt flag for Timer 2. Many similar such definitions in pic32-libs/include/peripheral/legacy/int_5xx_6xx_7xx_legacy.h.

			Also, in pic32-libs/include/peripheral/int.h:

	* void INTConfigureSystem(xxx): xxx could be INT_SYSTEM_CONFIG_MULT_VECTOR (the usual case) or INT_SYSTEM_CONFIG_SINGLE_VECTOR. Sets up the interrupts to be single vector or multi-vector.		* void INTConfigureSystem(xxx): xxx could be INT_SYSTEM_CONFIG_MULT_VECTOR (the usual case) or INT_SYSTEM_CONFIG_SINGLE_VECTOR. Sets up the interrupts to be single vector or multi-vector.
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	* void INTClearFlag(xxx): To be executed at the end of the ISR. The xxx appear to be defined in int_5xx_6xx_7xx.h, and include INT_T1 (timer 1), INT_INT0 (external interrupt 0), etc.		* void INTClearFlag(xxx): To be executed at the end of the ISR. The xxx appear to be defined in int_5xx_6xx_7xx.h, and include INT_T1 (timer 1), INT_INT0 (external interrupt 0), etc.
	* void INTSetVectorPriority(xxx,yyy): xxx is the vector (e.g., INT_EXTERNAL_0_VECTOR) declared in int_5xx_6xx_7xx.h (but since it is a memory location, it is defined elsewhere, not in C) and yyy is the priority level (e.g., INT_PRIORITY_LEVEL_4 defined in int.h, or just 4).		* void INTSetVectorPriority(xxx,yyy): xxx is the vector (e.g., INT_EXTERNAL_0_VECTOR) declared in int_5xx_6xx_7xx.h (but since it is a memory location, it is defined elsewhere, not in C) and yyy is the priority level (e.g., INT_PRIORITY_LEVEL_4 defined in int.h, or just 4).

	'''Legacy'''

⚫	* void INTEnableSystemMultiVectoredInt(void): Performs the tasks of IntEnableInterrupts() above (enables CPU for interrupts) and INTConfigureSystem(INT_SYSTEM_CONFIG_MULT_VECTOR). In pic32-libs/peripheral/int/source.
⚫	* mT2ClearIntFlag(): Clears the interrupt flag for Timer 2. Many similar such definitions in pic32-libs/include/peripheral/legacy/int_5xx_6xx_7xx_legacy.h.

	== Sample Code ==		== Sample Code ==

Lynch: /* Sample Code */

2011-01-31T11:16:38Z

Sample Code

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	Note that the vector names (like _TIMER_2_VECTOR) can be found in pic32-libs/include/proc/p32mx795f512l.h, and priority level can be written as ipl{1..7}. '''Note that this priority level must match the priority level assigned to the function/peripheral generating the interrupt.''' You can name your ISR routine whatever you want (here it is Timer2Handler). Macros for clearing different interrupt flags can be found in pic32-libs/include/peripheral/legacy/int_5xx_6xx_7xx_legacy.h.		Note that the vector names (like _TIMER_2_VECTOR) can be found in pic32-libs/include/proc/p32mx795f512l.h, and priority level can be written as ipl{1..7}. '''Note that this priority level must match the priority level assigned to the function/peripheral generating the interrupt.''' You can name your ISR routine whatever you want (here it is Timer2Handler). Macros for clearing different interrupt flags can be found in pic32-libs/include/peripheral/legacy/int_5xx_6xx_7xx_legacy.h.

	~~Alternative~~ for clearing the same interrupt flag include		Alternatives for clearing the same interrupt flag include
	<pre>		<pre>
	IFS0bits.T2IF = 0;		IFS0bits.T2IF = 0;

Lynch: /* Sample Code */

2011-01-31T11:16:14Z

Sample Code

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	Configuring the system to be able to handle multiple interrupts:		Configuring the system to be able to handle multiple interrupts:
	<pre>		<pre>
	// first your code setting up ~~the~~ peripherals to generate interrupts, then...		// first your code setting up peripherals to generate interrupts (with priorities), then...
	IntEnableSystemMultiVectoredInt();		IntEnableSystemMultiVectoredInt();
	</pre>		</pre>

	Writing ~~your~~ ISR:		Writing an ISR:
	<pre>		<pre>
	void __ISR(_TIMER_2_VECTOR, ipl2) Timer2Handler(void){		void __ISR(_TIMER_2_VECTOR, ipl2) Timer2Handler(void){
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	}		}
	</pre>		</pre>
	Note that the vector names (like _TIMER_2_VECTOR) can be found in pic32-libs/include/proc/p32mx795f512l.h, and priority level can be written as ipl{1..7}. You can name your ISR routine whatever you want (here it is Timer2Handler). Macros for clearing ~~the~~ interrupt ~~flag~~ can be found in pic32-libs/include/peripheral/legacy/int_5xx_6xx_7xx_legacy.h.		Note that the vector names (like _TIMER_2_VECTOR) can be found in pic32-libs/include/proc/p32mx795f512l.h, and priority level can be written as ipl{1..7}. '''Note that this priority level must match the priority level assigned to the function/peripheral generating the interrupt.''' You can name your ISR routine whatever you want (here it is Timer2Handler). Macros for clearing different interrupt flags can be found in pic32-libs/include/peripheral/legacy/int_5xx_6xx_7xx_legacy.h.

			Alternative for clearing the same interrupt flag include
			<pre>
			IFS0bits.T2IF = 0;
			</pre>
			(see p32mx795f512l.h) and
			<pre>
			IntClearFlag(INT_T2);
			</pre>

	== More Information ==		== More Information ==

Lynch: /* Sample Code */

2011-01-31T11:06:12Z

Sample Code

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	}		}
	</pre>		</pre>
	Note that the vector names can be found in pic32-libs/include/proc/p32mx795f512l.h, and priority level can be written as ipl{1..7}. You can name your ISR routine whatever you want (here it is Timer2Handler). Macros for clearing the interrupt flag can be found in pic32-libs/include/peripheral/legacy/int_5xx_6xx_7xx_legacy.h.		Note that the vector names (like _TIMER_2_VECTOR) can be found in pic32-libs/include/proc/p32mx795f512l.h, and priority level can be written as ipl{1..7}. You can name your ISR routine whatever you want (here it is Timer2Handler). Macros for clearing the interrupt flag can be found in pic32-libs/include/peripheral/legacy/int_5xx_6xx_7xx_legacy.h.

	== More Information ==		== More Information ==

Lynch: /* Sample Code */

2011-01-31T11:05:33Z

Sample Code

← Older revision		Revision as of 06:05, 31 January 2011
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	Configuring the system to be able to handle multiple interrupts:		Configuring the system to be able to handle multiple interrupts:
	<pre>		<pre>
	// ~~here~~ your code setting up the peripherals to generate interrupts~~; for example~~, ~~Timer 2~~		// first your code setting up the peripherals to generate interrupts, then...
	IntEnableSystemMultiVectoredInt();		IntEnableSystemMultiVectoredInt();
	</pre>		</pre>
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	}		}
	</pre>		</pre>
	Note that the vector names can be found in pic32-libs/include/proc/p32mx795f512l.h, and priority level can be written as ipl{1..7}. You can name your ISR routine whatever you want (here it is Timer2Handler). Macros for clearing the interrupt flag can be found in pic32-libs/include/peripheral/legacy/int_5xx_6xx_7xx_legacy.h.		Note that the vector names can be found in pic32-libs/include/proc/p32mx795f512l.h, and priority level can be written as ipl{1..7}. You can name your ISR routine whatever you want (here it is Timer2Handler). Macros for clearing the interrupt flag can be found in pic32-libs/include/peripheral/legacy/int_5xx_6xx_7xx_legacy.h.

	== More Information ==		== More Information ==

Lynch at 11:05, 31 January 2011

2011-01-31T11:05:03Z

@@ Line 66: / Line 66: @@
 == Sample Code ==
 <pre>
 == More Information ==

Lynch: /* Sample Code */

2011-01-31T10:58:21Z

Sample Code

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	== Sample Code ==		== Sample Code ==


			<pre>

			// here your code setting up the peripheral to generate interrupts

			IntEnableSystemMultiVectoredInt();

	== More Information ==		== More Information ==