Interfacing PIC with SPI memory - Revision history

Nelson Rosa: /* Overview */

2009-12-22T17:38:28Z

Overview

← Older revision		Revision as of 12:38, 22 December 2009
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	==Overview==		==Overview==
	Sometimes, it can be useful to interface the PIC with an external memory for data logging or other reasons, since there is limited memory available on the PIC itself. There are various types of memory which a PIC can communicate with. One common type of memory is EEPROM memory, which is non-volatile, so it keeps its data when power is turned off. One type of EEPROM memory uses SPI to communicate with the PIC. This article discusses connecting the 25AA1024, a one megabit EEPROM, to a PIC 18F4520.		Sometimes, it can be useful to interface the PIC with an external memory for data logging or other reasons, since there is limited memory available on the PIC itself. There are various types of memory which a PIC can communicate with. One common type of memory is EEPROM memory, which is non-volatile, so it keeps its data when power is turned off. One type of EEPROM memory uses SPI to communicate with the PIC. This article discusses connecting the [http://ww1.microchip.com/downloads/en/DeviceDoc/21836B.pdf 25AA1024], a one megabit EEPROM, to a PIC 18F4520.
	SPI is a three wire communication protocol which has a dedicated clock line, a serial in line, and a serial out line. The memory works by accepting commands on the clock in line, and then sending out data when requested on the clock out line.		SPI is a three wire communication protocol which has a dedicated clock line, a serial in line, and a serial out line. The memory works by accepting commands on the clock in line, and then sending out data when requested on the clock out line.
	===Notes on the 25AA1024===		===Notes on the 25AA1024===
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	Like other EEPROMS, it has a page buffer which stores data as it is received, and then writes the buffer all at once to the EEPROM memory. Writing takes a long time compared to the speed of data transfer- the SPI line can run up to 20 Mhz, but a write cycle is up to 6 ms. Because only one page can be written every 6 ms, the PIC cannot necessarily continuously send data, unless the rate is less than 256 bytes per 6 ms. When sending data, if the address reaches a page boundary the data will "wrap around" in the page buffer. For instance, if the start address is 250, and a page boundary is at 256, then the seventh byte sent will be actually stored in address 0, not 257. Because of this, pages '''must''' be written when a page boundary is met and a write cycle needs to be restarted at an address in the next page.		Like other EEPROMS, it has a page buffer which stores data as it is received, and then writes the buffer all at once to the EEPROM memory. Writing takes a long time compared to the speed of data transfer- the SPI line can run up to 20 Mhz, but a write cycle is up to 6 ms. Because only one page can be written every 6 ms, the PIC cannot necessarily continuously send data, unless the rate is less than 256 bytes per 6 ms. When sending data, if the address reaches a page boundary the data will "wrap around" in the page buffer. For instance, if the start address is 250, and a page boundary is at 256, then the seventh byte sent will be actually stored in address 0, not 257. Because of this, pages '''must''' be written when a page boundary is met and a write cycle needs to be restarted at an address in the next page.
	Other than the 3-wire serial interface, the chip also has an enable pin that must be low during write and read operations. Because of this, multiple 25AA1024s could be used, with each CE leading to a different pin on the PIC, so that many 25AA1024s could be used by the same PIC.		Other than the 3-wire serial interface, the chip also has an enable pin that must be low during write and read operations. Because of this, multiple 25AA1024s could be used, with each CE leading to a different pin on the PIC, so that many 25AA1024s could be used by the same PIC.

	==Circuit==		==Circuit==
	The PIC is connected to the SPI memory as shown. The chip select signal (/CS) is pulled low during communication. It cannot be permanently tied low, even if only one memory is used, because the low-high transition of /CS latches in data. /HOLD and /WP (write protect) can be useful in some instances, see the datasheet for more information.		The PIC is connected to the SPI memory as shown. The chip select signal (/CS) is pulled low during communication. It cannot be permanently tied low, even if only one memory is used, because the low-high transition of /CS latches in data. /HOLD and /WP (write protect) can be useful in some instances, see the datasheet for more information.

Thomas Peterson at 05:19, 19 November 2009

2009-11-19T05:19:03Z

← Older revision		Revision as of 00:19, 19 November 2009
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	[[Image:Spi_mem_ckt.png]]		[[Image:Spi_mem_ckt.png]]
	==Code==		==Code==
			The code below includes support functions for reading, writing, and chip erase. A single write latch writes in all the data buffered for the current page. Because of this, it is the job of the code calling the write function to make sure that a memory write will not go past a page boundary, or the data will end up in the wrong spot.
	Notes...
			In the example below, the PIC accepts a string of data on the RS232 line, terminated by a carriage return (0x13). This packet is then written to memory. The packet size shouldn't be larger than the define COMM_SIZE. The code that calls the write function includes example handling of page boundaries.

	Data logging (writing)		Data logging (writing)
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	}		}

	Similarly, the memory could be read with the same code but with the following in the main() function:		Similarly, the memory could be read with mostly the same code but with the following in the main() function:
	int32 temp_address = 0;		int32 temp_address = 0;
	char tmp_buf[COMM_BYTES+1];		char tmp_buf[COMM_BYTES+1];
Line 175:		Line 176:
	spi_mem_read(temp_address>>16,temp_address,COMM_BYTES,tmp_buf);		spi_mem_read(temp_address>>16,temp_address,COMM_BYTES,tmp_buf);
	//Print data		//Print data
	fprintf(~~xbee,~~"%x%x%x: %s \r\n", temp_address>>16, temp_address>>8,temp_address, tmp_buf);		fprintf("%x%x%x: %s \r\n", temp_address>>16, temp_address>>8,temp_address, tmp_buf);
	//Advance address		//Advance address
	temp_address += COMM_BYTES;		temp_address += COMM_BYTES;

Thomas Peterson at 05:15, 19 November 2009

2009-11-19T05:15:02Z

← Older revision		Revision as of 00:15, 19 November 2009
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	==Overview==		==Overview==
	Sometimes, it can be useful to interface the PIC with an external memory for data logging or other reasons, since there is limited memory available on the PIC itself. There are various types of memory which a PIC can communicate with. One common type of memory is EEPROM memory, which is non-volatile, so it keeps its data when power is turned off. One type of EEPROM memory uses SPI to communicate with the PIC. This article discusses connecting the 25AA1024, a one megabit EEPROM, to a PIC 18F4520.		Sometimes, it can be useful to interface the PIC with an external memory for data logging or other reasons, since there is limited memory available on the PIC itself. There are various types of memory which a PIC can communicate with. One common type of memory is EEPROM memory, which is non-volatile, so it keeps its data when power is turned off. One type of EEPROM memory uses SPI to communicate with the PIC. This article discusses connecting the 25AA1024, a one megabit EEPROM, to a PIC 18F4520.
			SPI is a three wire communication protocol which has a dedicated clock line, a serial in line, and a serial out line. The memory works by accepting commands on the clock in line, and then sending out data when requested on the clock out line.
	===Notes on the 25AA1024===		===Notes on the 25AA1024===
	The 25AA1024 has one megabit (125 kbytes) of memory organized in pages of 256 bytes each.		The 25AA1024 has one megabit (125 kbytes) of memory organized in pages of 256 bytes each.
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	Other than the 3-wire serial interface, the chip also has an enable pin that must be low during write and read operations. Because of this, multiple 25AA1024s could be used, with each CE leading to a different pin on the PIC, so that many 25AA1024s could be used by the same PIC.		Other than the 3-wire serial interface, the chip also has an enable pin that must be low during write and read operations. Because of this, multiple 25AA1024s could be used, with each CE leading to a different pin on the PIC, so that many 25AA1024s could be used by the same PIC.
	==Circuit==		==Circuit==
			The PIC is connected to the SPI memory as shown. The chip select signal (/CS) is pulled low during communication. It cannot be permanently tied low, even if only one memory is used, because the low-high transition of /CS latches in data. /HOLD and /WP (write protect) can be useful in some instances, see the datasheet for more information.

			[[Image:Spi_mem_ckt.png]]
	==Code==		==Code==
	Notes...		Notes...

Thomas Peterson at 20:17, 18 November 2009

2009-11-18T20:17:56Z

@@ Line 15: / Line 15: @@
  //LIMS
  //11-05-09
  #include <18F4520.h>
  #FUSES NOWDT, HS, NODEBUG, NOPROTECT
@@ Line 164: / Line 164: @@
     delay_ms(10000);
+ }

Thomas Peterson at 20:13, 18 November 2009

2009-11-18T20:13:18Z

Show changes

Thomas Peterson at 19:34, 17 November 2009

2009-11-17T19:34:53Z

← Older revision		Revision as of 14:34, 17 November 2009
Line 1:		Line 1:
	==Overview==		==Overview==
	Sometimes, it can be useful to interface the PIC with an external memory for data logging or other reasons, since there is limited memory available on the PIC itself. There are various types of memory which a PIC can communicate with. One common type of memory is EEPROM memory, which is non-volatile, so it keeps its data when power is turned off. One type of EEPROM memory uses SPI to communicate with the PIC. This article discusses connecting the 25AA1024, a one megabit EEPROM, to a PIC 18F4520.		Sometimes, it can be useful to interface the PIC with an external memory for data logging or other reasons, since there is limited memory available on the PIC itself. There are various types of memory which a PIC can communicate with. One common type of memory is EEPROM memory, which is non-volatile, so it keeps its data when power is turned off. One type of EEPROM memory uses SPI to communicate with the PIC. This article discusses connecting the 25AA1024, a one megabit EEPROM, to a PIC 18F4520.
	=Notes on the 25AA1024=		===Notes on the 25AA1024===
	The 25AA1024 has one megabit (125 kbytes) of memory organized in pages of 256 bytes each.		The 25AA1024 has one megabit (125 kbytes) of memory organized in pages of 256 bytes each.
	Like other EEPROMS, it has a page buffer which stores data as it is received, and then writes the buffer all at once to the EEPROM memory. Writing takes a long time compared to the speed of data transfer- the SPI line can run up to 20 Mhz, but a write cycle is up to 6 ms. Because only one page can be written every 6 ms, the PIC cannot necessarily continuously send data, unless the rate is less than 256 bytes per 6 ms. When sending data, if the address reaches a page boundary the data will "wrap around" in the page buffer. For instance, if the start address is 250, and a page boundary is at 256, then the seventh byte sent will be actually stored in address 0, not 257. Because of this, pages '''must''' be written when a page boundary is met and a write cycle needs to be restarted at an address in the next page.		Like other EEPROMS, it has a page buffer which stores data as it is received, and then writes the buffer all at once to the EEPROM memory. Writing takes a long time compared to the speed of data transfer- the SPI line can run up to 20 Mhz, but a write cycle is up to 6 ms. Because only one page can be written every 6 ms, the PIC cannot necessarily continuously send data, unless the rate is less than 256 bytes per 6 ms. When sending data, if the address reaches a page boundary the data will "wrap around" in the page buffer. For instance, if the start address is 250, and a page boundary is at 256, then the seventh byte sent will be actually stored in address 0, not 257. Because of this, pages '''must''' be written when a page boundary is met and a write cycle needs to be restarted at an address in the next page.

Thomas Peterson: Creating page

2009-11-17T19:34:16Z

Creating page

New page

==Overview==
Sometimes, it can be useful to interface the PIC with an external memory for data logging or other reasons, since there is limited memory available on the PIC itself. There are various types of memory which a PIC can communicate with. One common type of memory is EEPROM memory, which is non-volatile, so it keeps its data when power is turned off. One type of EEPROM memory uses SPI to communicate with the PIC. This article discusses connecting the 25AA1024, a one megabit EEPROM, to a PIC 18F4520.
=Notes on the 25AA1024=
The 25AA1024 has one megabit (125 kbytes) of memory organized in pages of 256 bytes each.
Like other EEPROMS, it has a page buffer which stores data as it is received, and then writes the buffer all at once to the EEPROM memory. Writing takes a long time compared to the speed of data transfer- the SPI line can run up to 20 Mhz, but a write cycle is up to 6 ms. Because only one page can be written every 6 ms, the PIC cannot necessarily continuously send data, unless the rate is less than 256 bytes per 6 ms. When sending data, if the address reaches a page boundary the data will "wrap around" in the page buffer. For instance, if the start address is 250, and a page boundary is at 256, then the seventh byte sent will be actually stored in address 0, not 257. Because of this, pages '''must''' be written when a page boundary is met and a write cycle needs to be restarted at an address in the next page.
Other than the 3-wire serial interface, the chip also has an enable pin that must be low during write and read operations. Because of this, multiple 25AA1024s could be used, with each CE leading to a different pin on the PIC, so that many 25AA1024s could be used by the same PIC.
==Circuit==