PIC16F684 Registers

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Latest revision as of 15:38, 11 July 2006

This page is a more detailed overview of the registers. It includes the most commonly used registers. All remaining information can be found on the Microchip website.

Contents 1 Memory Map 1.1 Registers in Memory Bank 0 1.2 Registers in Memory Bank 1 2 Register Descriptions 2.1 Configuration 2.1.1 STATUS 2.1.2 OPTION 2.1.3 INTCON 2.1.4 PIE1 2.2 I/O 2.2.1 PORTA 2.2.2 TRISA 2.2.3 ANSEL 2.2.4 IOCA 2.2.5 PORTC 2.2.6 TRISC 2.3 Timers 2.3.1 T2CON 2.4 A/D Configuration and Usage 2.4.1 ADCON0 2.4.2 ADCON1 2.4.3 ADRESH 2.4.4 ADRESL 2.5 PWM Configuration and Usage 2.5.1 CCP1CON 2.5.2 CCPR1L 2.5.3 PR2

Memory Map

These images show the memory map of the PIC16F684. Use these for a quick reference for register addresses and initial values.

Registers in Memory Bank 0

Registers in Memory Bank 1

Register Descriptions

Configuration

STATUS

OPTION

INTCON

PIE1

The PIE1 is used to enable/disable interrupts.

I/O

PORTA

TRISA

ANSEL

The ANSEL register determines whether a pin, AN<7:0>, is an analog input or not.

IOCA

The IOCA register determines whether or not an interrupt is generated when a digital pin on PORTA, RA<5:0>, experiences a change in value.

PORTC

TRISC

Timers

T2CON

T2CON sets up Timer2, which is used for PWM timing.

A/D Configuration and Usage

When configuring and using the ADC the following functions must be considered:

• Port configuration (ANSEL)
• Channel selection (ADCON0)
• ADC voltage reference selection (ADCON0)
• ADC conversion clock source (ADCON1)
• Interrupt control (INTCON)
• Results formatting (ADCON0)

ADCON0

ADCON1

ADRESH

ADRESH contains the highest significant digits of the A/D conversion. The values contained in this register depend on whether you select "Right Justified" (ADFM=1) or "Left Justified" (ADFM=0) results.

Right Justified (ADFM=1):

Left Justified (ADMF=0):

ADRESL

ADRESL contains the lowest significant digits of the A/D conversion. The values contained in this register depend on whether you select "Right Justified" (ADFM=1) or "Left Justified" (ADFM=0) results.

Right Justified (ADFM=1):

Left Justified (ADMF=0):

PWM Configuration and Usage

The PWM duty cycle is specified by writing a 10-bit value to multiple registers: CCPR1L register and CCP1<1:0> bits of the CCP1CON register. The CCPR1L contains the eight MSbs and the CCP1<1:0> bits of the CCP1CON register contain the two LSbs.

CCP1CON

The CCP1CON register configures PWM output by selecting Single, Half or Full-Bridge modes. These modes were created to make interfacing the PIC16F684 with H-Bridges and Full-Bridges simple.

CCPR1L

The CCPR1L register holds the 8 MSbs of the PWM duty cycle. If you are using an analog input to determine the duty cycle, you should set up the A/D to be left justified and then all you have to do is copy ADRESH to CCPR1L.

PR2

The PR2 is an 8-bit register used to set the PWM period. This must be set along with the Timer2 prescale in T2CON. The table below shows the results: