Difference between revisions of "Kirchhoff's Current and Voltage Laws"

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[[Image:kirchhoff_sign_conventions.jpg]]
[[Image:kirchhoff_sign_conventions.jpg]]

If the current flowing in the direction of the arrow, then the the power absorbed by the component is <math>p=iv</math>, and the component absorbs a positive amount of power. If the current is flowing out of the positive terminal, we can assign a negative current or negative voltage to the component in order to perserve our sign convention. Then, the power absorbed <math>p=iv</math> will come out to be negative. This means that the component is actually supplying power. Note that resistors cannot store power (and hence cannot supply power); the energy absorbed by a resistor is lost as heat energy.


The circuit below shows a battery, resistor, inductor, and capacitor connected in series.
The circuit below shows a battery, resistor, inductor, and capacitor connected in series.

Revision as of 13:25, 14 June 2006

Kirchhoff's Current Law and Nodal Analysis

Kirchhoff's Current Law (KCL) says that the current going into a junction or node is equal to the current going[[Image: out of a node. In other words, the sum of the currents entering the node must be zero (if we consider currents leaving the node to be a negative current entering the node). Consider the following diagram:

File:Kirchhoffs current law node diagram.jpg

For the node A in the center, i1 and i2 are entering the node, and i3 and i4 are leaving the node. We would write:

which can also be written as

Note that i7 is equal to i2; we can prove this by analyzing node B. We can also treat everything between node C and D as one big node, and conclude that i5 is equal to i6 without having to know the value of any of the currents within.

When solving for the currents in a real problem, we can choose arbitrarily in which direction the arrows point. If we guessed incorrectly, the value we obtain after solving for the current will be negative. However, if you draw i4 as leaving node A as in the diagram above, don't draw i4 as leaving node D when you are writing your node equations.

]]If we had drawn the currents for node A as following:

File:Kirchhoffs current law node2.jpg

Then our node equation looks like:

Unless all the currents are zero, one or more of the currents must turn out to be negative. The negative currents will flow in the direction opposite from that which the arrow is pointing.

Kirchhoff's Voltage Law and Loop Analysis

Kirchhoff's Voltage Law (KVL) states that the sum of the voltages around any closed loop is equal to zero. Also, the voltage between any two nodes is the same no matter which path is taken. In the following diagram, it doesn't matter which path you choose(or which direction you go in) to add the voltages of the components from point A back to point A, they all must add up to zero.

File:Kirchhoff voltage law loop.jpg

Also, the voltage between any two points does not depend on which path you take. In the following diagram, the voltage between point A and point B is the same no matter which path is choosen.

File:Kirchhoff voltage law paths.jpg

To keep all the positive an negative signs lined up when solving a circuit, we use the following sign convention for the voltage and current for the components:

File:Kirchhoff sign conventions.jpg

If the current flowing in the direction of the arrow, then the the power absorbed by the component is , and the component absorbs a positive amount of power. If the current is flowing out of the positive terminal, we can assign a negative current or negative voltage to the component in order to perserve our sign convention. Then, the power absorbed will come out to be negative. This means that the component is actually supplying power. Note that resistors cannot store power (and hence cannot supply power); the energy absorbed by a resistor is lost as heat energy.

The circuit below shows a battery, resistor, inductor, and capacitor connected in series.

File:Kirchhoff voltage law analysis1.jpg

In this circuit, we have chosen to draw the current flowing clockwise and assign the voltages for our components according to our sign convents. We then add up the voltages of the components, following the loop. It doesn't matter if you go clockwise or counter-clockwise. If the signs across a component goes from positive to negative (in the direction of your loop), this indicates a drop in voltage; if it goes from negative to positive, this indicates a rise in voltage.

In the example above, if we choose to start in the bottom left corner and move in the clockwise direction, our equation looks like:

or if we go in the counter-clockwise direction, we get:

which is the same thing.

If we had drawn the current going in a counter-clockwise direction, our circuit diagram would look like this:

File:Kirchhoff voltage law analysis2.jpg

Adding up the voltages gives:

If we know that is positive, then will turn out to be negative, and we know we have our signs flipped.

Example and Practice Problems

Example 1

Find the voltage and current of each resistor at the steady state of the system.

File:Kirchhoff example 1.jpg

Answer: At steady state, the capacitor becomes charged and acts like an open circuit, and the inductor acts like a short circuit. Therefore, at steady state, our system is equivalent to:

File:Kirchhoff example1 1.jpg

First, simplify the network of resistors. The combined resistance of the three resistors is equal to:

The voltage across the resistors is 10V, and using ohm's law, we find that the current going through the circuit is . This is the current flowing through the voltage source R1. Kirchhoff's voltage law tells us that the voltage or R2 and R3 are the same, and the sum of R1 and R2 is equal to 10V. We can find the voltage of R1 by using Ohm's law again: . Then R2 and R3 must have across them, and from that we can calculate that R2 's current is , and R3 's current is . Note that the sum of the currents for R2 and R3 is equal to the current in R1.

Example 2

Find the voltage and current of each element in the system.

File:Kirchhoff example2.jpg

We can solve this by writing two loop equations using KVL. For the loop on the left: